Arithmetic operations are frequently encountered in instrumentation applications and/or systems. Even though "software" techniques can be used for these operations, in many applications it is not economically feasible to utilize a stored-program computer system to accomplish same. Because of this and in view of the rapid progress of semiconductor technology, digital techniques and methods have become extremely important in instrumentation systems. Thus, "hardware" systems are now performing many special arithmetic operations.
With respect to "hardware", rate multipliers can be configured with other circuit components to perform addition, subtraction, multiplication and other arithmetic functions. A severe limitation of these circuits is that to obtain increased accuracy, a larger digital word size must be used. The foregoing results in a corresponding increase in the required circuitry and an increase in processing time since processing is done in a serial manner. In addition, in most instances, the "hardware" requires a digital input and output format which is not compatible with most instrumentation systems.
Because of the foregoing, it has become desirable to develop a square root extractor circuit which utilizes a relatively small word size and yet achieves a high degree of accuracy, and which is compatible with an analog input and output format.